1. Field of the Invention
The present invention relates to an integrated circuit device with active and passive elements built in a semiconductor substrate.
2. Description of the Related Art
In the technical field of integrated circuit device in which an active element such as transistor and a passive element such as resistor, capacitor or inductor are integrated on a semiconductor substrate, the 3D packaging is rapidly becoming mainstream instead of the conventional SMT (surface mount technology). Particularly, owing to an increasing demand for miniaturization, high speed and low power consumption, there has been a remarkable progress in the 3D-SiP technology, where the 3D packaging is combined with SiP (system in package) in which a system composed of a plurality of LSIs is enclosed in a single package. The SiP also has an advantage in reducing the power consumption, shorting the development times and reducing the cost. The integration of an advanced system can be achieved by the combination of the SiP and the 3D packaging which enables high density packaging.
As an essential technology for the above-mentioned 3D packaging, there has been known a TSV (through silicon via) technology. By using the TSV technology, a great deal of functionality can be packed into a small footprint, and critical electrical paths through the device can be drastically shortened, leading to faster operation.
However, since passive elements are to be mounted with connectors for the passive elements (pads) formed one surface of a semiconductor substrate for active elements, there is a limit to reducing the height and size of the integrated circuit device.
On the other hand, Japanese Unexamined Patent Application Publication No. 2010-67916 discloses an integrated circuit device having a first substrate and a second substrate. The first substrate is composed of a semiconductor substrate. An active element is formed on one surface of the first substrate with a first through electrode passing through the first substrate. A passive element is formed on one surface of the second substrate with a second through electrode passing through the second substrate. The other surface of the first substrate faces the other surface of the second substrate. The first through electrode is electrically connected to the second through electrode.
However, since the semiconductor substrate having the active element has to be connected to the substrate having the passive element, there is also a limit to reducing the height and size.